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Qualcomm's HBC Memory, Alphawave, Modular, and more

June 29, 2026 · 60 min

Show notes

Qualcomm flew Austin to New York for its investor day, where the communications company laid out a plan to make data center, automotive, and IoT two-thirds of its business by FY29. Austin was in the room and asked Cristiano Amon a question on the record. Vik watched the whole thing on YouTube. Together they break down what actually changed.

The technical centerpiece is High Bandwidth Compute (HBC): stacking LPDDR on top of logic to expose the whole face of the chip for interconnects, claiming up to 100x more lanes and a path around the HBM bandwidth bottleneck. Austin and Vik dig into what's really under that memory, why "no advanced packaging needed" just moves the hard problem somewhere worse, and how it compares to d-Matrix. And as Austin put it: don't let anyone tell you HBM is dead. MOAR memory.

Then the roadmap: the AI200/250/300 accelerators, the C1000 server CPU (5 GHz, 250+ cores, Meta as a customer), the Alphawave and Modular acquisitions, and Chris Lattner's Mojo.

The most interesting takeaway might not be the data center at all. Qualcomm's edge play — AI-defined vehicles, cars as token generators, and a $1T robotics opportunity by 2040 — could be where High Bandwidth Compute matters most.

Chapters:
0:00 Communications? That's just the start
4:08 Inside Qualcomm's investor day
9:16 Can Qualcomm build a data center business?
13:09 Disaggregated inference opens the door
17:57 High Bandwidth Compute: memory on the XPU
30:29 "No advanced packaging" just moves the problem
36:20 The roadmap, Alphawave, and Modular
46:00 The C1000 CPU and the agentic shortage
50:40 Cars as token generators, the $1T robotics bet
57:32 The memory market: MOAR

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Austin's Paid Substack: https://www.chipstrat.com

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